The Pipeback Switch: High Performance Packet Switching with Guaranteed Delivery and Linear Buffer Complexity

A high performance packet switching architecture called the Pipeback switch is proposed. This architecture ensures lossless packet delivery while maintaining linear buffer complexity. The Pipeback switch improves upon the popular Knockout switch proposed by Y. Yeh et al. Both switches use an N × N space division fabric with output queuing and both designs are motivated by the observation that the probability of more than L packets arriving in a given timeslot being destined for one particular output port sharply decreases as L is increased. This probability is comparable to the packet loss probability due to transmission errors for L N . While the arrival of more than L packets destined for a single output in a single timeslot in the Knockout switch results in dropped packets due to buffer blocking, the Pipeback switch avoids such loss by maintaining a separate shared buffer architecture common to all the output ports. This common architecture consists of a novel Pipeback concentration network and a buffer pool. The buffer pool accommodates all the knocked out packets that the Knockout switch would have dropped as a result of buffer blocking, and pipes them back to a separate input line. We further show that the use of buffer pool leads to a reduction in the number of separate output buffers required at each output port.